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This reverts commit f5e5fbc. Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
This reverts commit 868c5c8. Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
This reverts commit 2914126. Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
This reverts commit 287ff5e. Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
Since the static address may be zero, update the device address based on the dynamic address. Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
Since the static address may be zero, update the device address based on the dynamic address. Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
- Add device tree entries for Venice A0 to support 2P and 2X1P for RMI and TSI devices - This will provide the dynamic address to be used by user space applicaitons Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
- Add device tree entries for APML devices (RMI/TSI) for Venice AB/B0 platforms. Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
- Add device tree entries for APML devices (RMI/TSI) for SP8 platforms. Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
- Add I3C device IDs for the Venice AB/B0 and SP8 platforms, for RMI and TSI APML devices. Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
mahkurap
approved these changes
Apr 13, 2026
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Add support for the APML devices device IDs in linux-aspeed for Venice A0/AB/B0 and SP8.
Testing is completed on AB platform and A0 platform.
Testing report and patch is shared in ticket: https://amd.atlassian.net/browse/DCSM-993
Major Changes: