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Pull requests: chipsalliance/python-fpga-interchange

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Add interchange helper script for REPL mode
#164 opened Jul 28, 2022 by kboronski-ant Collaborator Draft
[WIP] Importing cell timings from prjxray-db
#147 opened Mar 10, 2022 by mkurc-ant Collaborator Loading…
xcup: Fix BUFG cell type
#112 opened Jul 20, 2021 by gatecat Contributor Loading…
Adding nextpnr routing timing support
#111 opened Jul 15, 2021 by gatecat Contributor Loading…
1 of 2 tasks
Fix for property unquoting
#6 opened Dec 15, 2020 by mkurc-ant Collaborator Loading…
ProTip! Exclude everything labeled bug with -label:bug.