[BUG] Zephyr baseline update blocked

[kv2019i]

Describe the bug
Updating SOF main to Zephyr main shows issues in SOF CI tests, blocking merging.

Last good #8797
First failed attempt: #8804 (Zephyr zephyrproject-rtos/zephyr@6a0b1da )
Latest failed attempt: #8813

To Reproduce
Update Zephyr version in SOF west.yml and submit PR to SOF CI.

Reproduction Rate
100%

Expected behavior
SOF test suite passed with latest Zephyr.

Impact
Blocks updates of Zephyr in SOF main.

Environment
See above

Screenshots or console output

Notes
Discovery of this was delayed by an earlier regression spotted in #8747 and later fixed on SOF side (by #8790 ).

Bisect is slowed down by interface change decsribed in zephyrproject-rtos/zephyr#64755

[kv2019i]

Fixed done on Zephyr side:

• Revert "pm: Remove CURRENT_CPU macro" zephyrproject-rtos/zephyr#68234 (UPDATE: replaced by intel_adsp: Fix interruption locks in power management code zephyrproject-rtos/zephyr#67863 )
• soc: xtensa: intel_adsp: cavs: fix XCC build zephyrproject-rtos/zephyr#68108
• ace: fix DSP panic during startup zephyrproject-rtos/zephyr#67617

[kv2019i]

Status as of 31th Jan, we have two blocking issues:

• failure to power down non-primary core, example log showing SET_DX IPC failure -> https://sof-ci.01.org/sofpr/PR8813/build2413/devicetest/index.html?model=MTLP_RVP_NOCODEC&testcase=check-pause-resume-playback-100
• failure in chain-dma stop on Intel cAVS2.5 platforms, SOF-side workaround exists 386a525 , but tracked as [BUG] multiple-pause-resume.sh sof-test fails to FW_GEN_MSG failed with err 3018 #8792

[kv2019i]

The issues with SMP interface change are still unresolved, but I took a quick peek at latest Zephyr 3.6.0-rc2 and we have more problems:

• -fno-lto added -> xtensa toolchain fails
• various union initializers that break -> break Intel TGL builds with xtensa toolchain in SOF CI
• the cache interface change (to sys_cache) -> requires SOF side changes

[marc-hb]

I'll look at the toolchain issues.